View TB67H400AFNG_8903689.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

tb67h400a fg/aftg/afng 2013- 11- 20 1 toshiba bicd integrated circuit silicon monolithic tb67h400afg, tb67h400aftg, TB67H400AFNG pwm chopper - type brushed dc motor driver the tb67h400a is brush ed dc moto r driver of a pwm chopper - type . the tb67h400a is a dual channel h - sw driver which can co ntrol two brushed dc motors. moreover, the parallel control function (la rge mode) of an output part is built in, and 1ch high current drive is also possible. fabricated with the bicd process, the tb67h400a is rated at 50v , 4.0a( 2ch ) /8.0a(1ch) . features ? monolithic motor driver using bicd process. ? capable of controlling two brushed dc motor. ? 2 drive modes ( pwm co ntrolled constant - current / direct pwm ) ? 4 operation modes (clock- wise/counter c lock - wise/brake/stop(off)) ? low on - resistance outp ut stage (hi gh side+low side:0.49 (typ)) ? high voltage and current (for specification, please refer to absolute maximum ratings and o perating r anges .) ? built- in error detection circuits (thermal shutdown(tsd), over - current detection (isd), and power - on reset (por). ? built- in regulator allows the tb67h400a to function with a single vm power supply. ? able to customize pwm (internal chopping) frequency by external components. ? multi package lineup . tb67h400afg: hsop28 -p- 0450- 0.80 tb67h400aftg: p - wqfn48- 0707- 0.50- 003 t b67h400afng: htssop48-p- 300- 0.50 note: please be careful about the thermal conditions during use. fg p - wqfn48 - 0707 - 0.50 - 003 htssop48 - p - 300 - 0.50 ftg weight 0.1 0 g ( typ ) fng weight 0. 21 g ( typ ) weight: 0. 79 g ( typ ) hsop28 - p - 0 450 - 0.80
tb67h400a fg/aftg/afng 2013- 11- 20 2 pin assignment (tb67h400a) note: please connect the fin(gnd) to the pcb ground pattern when using the hsop package. note: please connect the corner pad a nd the exposed pad to the pcb ground pattern when using the qfn package. 1 2 3 4 5 6 7 8 9 10 11 12 13 15 16 17 18 19 20 21 22 23 24 25 26 27 28 14 ina1 ina2 pwma pwmb in b1 in b2 tblkab fin(gnd) rsa nc outa+ nc gnd outa - gnd gnd outb - gnd nc outb+ nc rsb fin(gnd) vm vcc nc nc vref hbmode oscm fg (top view) (top view) 1 2 3 4 5 6 7 8 9 10 11 12 36 35 3 4 33 32 31 30 29 28 27 26 13 14 15 16 17 18 19 20 21 22 23 24 25 48 47 46 45 44 43 42 41 40 39 38 37 f t g nc inb1 inb2 tblkab gnd nc rsa rsa nc outa+ outa+ nc nc nc gnd outa - outa - gnd gnd outb - outb - gnd nc nc nc outb+ outb+ nc rsb rsb nc vm nc vcc nc nc nc nc nc gnd vref hbmode oscm ina1 ina2 pwma pwmb nc
tb67h400a fg/aftg/afng 2013- 11- 20 3 note: please connect the exposed pad to the pcb ground pattern when using the htssop package. 1 2 3 4 5 6 7 15 16 17 18 19 20 28 29 30 31 32 33 34 42 43 44 45 46 47 48 21 oscm ina1 ina2 pwma pwmb nc nc nc outa+ outa+ nc nc gnd n c gnd nc nc nc outb+ outb+ nc nc vref nc hbmode nc gnd nc fng (top view) 22 23 24 25 26 27 8 9 10 11 12 13 14 35 36 37 38 39 40 41 inb1 inb2 tblkab gnd nc rsa rsa outa - outa - gnd gnd outb - outb - nc rsb rsb vm nc vcc nc
tb67h400a fg/aftg/afng 2013- 11- 20 4 tb67h400a block diagram * please note that in the block diagram, functional blo cks or constants may be omitted or simplified for explanatory purposes. inb1 inb2 tblkab pwmb pwma vref motor oscillator oscm vcc regulator vcc tsd isd rsb motor control logic predriver rsa vm curr ent reference setting current comp current comp predriver current level set power - on reset osc - clock converter system oscillator gnd ina2 ina1 standby c ontrol + blank time s elector + h - bridge mode select + signal deco de logic hbmode
tb67h400a fg/aftg/afng 2013- 11- 20 5 notes: all the grounding wires of the tb67h400a must run on the solder within the mask of the pcm. it must also be externally terminated at a single point. also, the grounding meth od should be considered for efficient heat dissipation. careful attention should be paid to the layout of the output, vm and gnd traces, to avoid short circuits across output pins or to the power supply or ground. if such a short circuit occurs, the devi ce may be permanently damaged. also, the utmost care should be taken for pattern designing and implementation of the device since it has power supply pins ( vm , rs , out, gnd) through which a particularly large current may run. if these pins are wired incorr ectly, an operation error may occur or the device may be destroyed. the logic input pins must also be wired correctly. otherwise, the device may be damaged owing to a current running through the ic that is larger than the specified current.
tb67h400a fg/aftg/afng 2013- 11- 20 6 pin function s tb67h400afg (hsop28) pin no.1 -28 pin no. pin name function 1 ina1 bridge a operation mode set pin 1 2 ina2 bridge a operation mode set pin 2 3 pwma bridge a short brake input 4 pwmb bridge b short brake input 5 inb1 bridge b operation mode set pin 1 6 inb2 bridge b operation mode set pin 2 7 tblkab bridge a and b digital tblk setting 8 rsa bridge a sense output 9 nc not connected 10 outa+ bridge a + output 11 nc not connected 12 gnd ground pin 13 outa - bridge a - output 14 gnd ground p in 15 gnd ground pin 16 outb - bridge b - output 17 gnd ground pin 18 nc not connected 19 outb+ bridge b + output 20 nc not connected 21 rsb bridge b sense output 22 vm motor voltage supply 23 vcc internal regulator voltage monitor 24 nc not conne cted 25 nc not connected 26 vref current customize for bridge a and b 27 hbmode h - bridge operation mode set 28 oscm oscillator frequency set pin ? please do not connect any pattern to the nc pin.
tb67h400a fg/aftg/afng 2013- 11- 20 7 pin explanation tb67h400aftg (qfn48) pin no.1 -28 pin no. pin name function 1 nc not connected 2 inb1 bridge b operation mode set pin 1 3 inb2 bridge b operation mode set pin 2 4 tblkab bridge a and b digital tblk setting 5 gnd ground pin 6 nc not connected 7 rsa(*) bridge a sense output 8 rsa(*) bridge a sense output 9 nc not connected 10 outa+(*) bridge a + output 11 outa+(*) bridge a + output 12 nc not connected 13 nc not connected 14 nc not connected 15 gnd ground pin 16 outa - (*) bridge a C output 17 outa - (*) bridge a C output 18 gnd ground pin 19 gnd ground pin 20 outb - (*) bridge b - output 21 outb - (*) bridge b - output 22 gnd ground pin 23 nc not connected 24 nc not connec ted 25 nc not connected 26 outb+(*) bridge b + output 27 outb+(*) bridge b + output 28 nc not connected
tb67h400a fg/aftg/afng 2013- 11- 20 8 pin no.29 -48 pin no. pin name function 29 rsb(*) bridge b sense output 30 rsb(*) bridge b sense output 31 nc not connected 32 vm motor voltage supply 33 nc not connected 34 vcc internal regulator voltage monitor 35 nc not connected 36 nc not connected 37 nc not connected 38 nc not connected 39 nc not connected 40 gnd ground pin 41 vref current customize for bridge a and b 42 hbmode h - bridge operation mode set 43 oscm oscillator frequency set pin 44 ina1 bridge a operation mode set pin 1 45 ina2 bridge a operation mode set pin 2 46 pwma bridge a short brake input 47 pwmb bridge b short brake input 48 nc not con nected ? please do not connect any pattern to the nc pin. ? * : please connect the pins with the same names, at the nearest point of the device.
tb67h400a fg/aftg/afng 2013- 11- 20 9 pin explanation TB67H400AFNG (htssop48) pin no.1 -28 pin no. pin name function 1 oscm oscillator frequency set pin 2 nc not connected 3 ina1 bridge a operation mode set pin 1 4 ina2 bridge a operation mode set pin 2 5 pwma bridge a short brake input 6 nc not connected 7 pwmb bridge b short brake input 8 inb1 bridge b operation mode set pin 1 9 inb2 bridge b operation mode set pin 2 10 tblkab bridge a and b digital tblk setting 11 gnd ground pin 12 nc not connected 13 rsa(*) bridge a sense output 14 rsa(*) bridge a sense output 15 nc not connected 16 outa+(*) bridge a + output 17 outa+(*) bridge a + output 18 nc not connected 19 nc not connected 20 gnd ground pin 21 nc not connected 22 outa - (*) bridge a C output 23 outa - (*) bridge a C output 24 gnd ground pin 25 gnd ground pin 26 outb - (*) bridge b - output 27 outb - (*) bridge b - output 28 n c not connected
tb67h400a fg/aftg/afng 2013- 11- 20 10 pin no.29 -48 pin no. pin name function 29 gnd ground pin 30 nc not connected 31 nc not connected 32 outb+(*) bridge b + output 33 outb+(*) bridge b + output 34 nc not connected 35 rsb(*) bridge b sense output 3 6 rsb(*) bridge b sense output 37 nc not connected 38 nc not connected 39 vm motor voltage supply 40 nc not connected 41 vcc internal regulator voltage monitor 42 nc not connected 43 nc not connected 44 nc not connected 45 nc not connected 46 gn d ground pin 47 vref current customize for bridge a and b 48 hbmode h - bridge operation mode set ? please do not connect any pattern to the nc pin. ? * : please connect the pins with the same names, at the nearest point of the device.
tb67h400a fg/aftg/afng 2013- 11- 20 11 equivalent circuit (tb67h400a) pin name input/output signal equivalent circuit ina1 ina2 pwma inb1 inb2 pwmb tb lkab hbmode logic input (vih/vil) vih: 2.0v(min)~5.5v(max) vil : 0v(min)~0.8v(max) vcc vref vcc regulator specification 4.75v(min)~5.0v(typ)~5.25v(max) vref voltage range 0v~4.0v oscm oscm setup frequency 0.64mhz(min)~1.12mhz(typ)~2.4mhz(max) outa+ outa - outb+ outb - rsa rsb vm operation range 10v(min)~47v(max) output pin voltage range 10v(min)~47v(max) please note that in the equivalent input circuit, functional blocks or constants may be omitted or simplified for explanatory purposes. 100k 1 k gnd logic input 1k vcc gnd vref 500 1k oscm gnd gnd rs out+ out -
tb67h400a fg/aftg/afng 2013- 11- 20 12 function mode (brushed dc motor mode) logic input function table (1) ina1, in a2 these pins set the drive mode for bridge a pwm a in a1 in a2 out a+ out a - function input l l l off (hi - z) off (hi - z) standby mode (*) h stop(off) l l h l l short brake h l h ccw (counter clock - wise) l h l l l short brake h h l cw (clock - wise) l h h l l short brake h (2) inb1, in b2 these pins set the drive mode for bridge b pwm a in a1 in a2 out b + out b - function input l l l off (hi - z) off (hi - z) standby mode (*) h stop(off) l l h l l short brake h l h ccw (counter clock - wise) l h l l l short brake h h l cw (clock - wise) l h h l l short brake h *note: the standby mode is only enabled when all 6 logic input pins (in a1,in a2,pwm a,in b1, in b2,pwm b) are set to low level. if either of the 6pins are set to high level, the standby mode will be canceled.
tb67h400a fg/aftg/afng 2013- 11- 20 13 (3) tblkab this pin will set the noise rejection time. tblk ab tblk noise rejection time l digital tblk = foscm4clk h digital tblk = foscm6clk please note that the timing charts or constants may be omitted or simplified for explanatory purposes. the d igital tblk is used to avoid error judgment of varistor recovery current that occurs in charge drive mode when h- bridges are used with dc motors. the d igital tblk time can be controlled with tblka b pin. by setting d igital tblk, direct pwm control and constant - current control is possible, but the motor current will rise above the predefined current level (nf) while digital t blk is active. besides d igital tblk, a nalog tblk (400ns typ.) settled by an internal constant of ic is also attached. digital tblk timing for brushed dc motor the digital tblk is inserted at the beginning of each charge period of the constant current chopping, and also when either the ina1/a2/b1/b2 is switched. timing charts may be simplified for explanatory purpose. digital tblk oscm 0 1 2 3 tblk count in1/in2 digital tblk signal (tblkab=l) synchuronous delay 4 5 digital tblk signal (tblk ab =h) digital tblk 6 digital tblk iout in1 in2
tb67h400a fg/aftg/afng 2013- 11- 20 14 (4) hbmode this pin sets the h - bridge operation mode. pin name function input setting hbmode h - bridge operation setting low small mode high large mode note: when using the large mode, please make sure that the impedance between a channel and b channel is balanced. also, make sure that the output pins (outa+ and outa - , outb+ and outb- ), rs pins (rsa and rsb) are connected to each other when using the large mode. note : please set the hb mode to low or high with the pcb pattern. (do not change the logic input level during opera tion.) note: when the hb_mode pin is set to high level, the motor control will be controlled by the ach inputs (in a1,in a2,pwm a) . the bch inputs will be invalid. (when using the tb67h400a in large mode, setting the in b1,in b2,pwm b to low level is pref erred.) tblk ab pin is effective in both small/large mode(hb mode=l/h). h - bridge connection example 2 small dc motor operation setting example (hb mode=l) 2 small dc motor operation h - bridge a ou t a - o ut a rrs vm motor h - bridge b motor rrs vm outb - outb
tb67h400a fg/aftg/afng 2013- 11- 20 15 1 large dc motor operation setting example (hb mode=h) please note that in the equivalent input circuit, functional blocks or constants may be omitted or simplified for explanatory purposes. dc small mode ->h - bridge a and b will operate separately (for two brushed dc motor operation ) dc large mode ->h - bridge a and b will operate as a single h - bridge. (for one brushed dc motor operation) when the hb mode is set to high level, the pin function will be as follows. pin hb mode=h(large mode ) ina1 inl1 ina2 inl2 pwma pwml pwmb dont care (motor will be controlled by inl1,in l2,pwml pins) inb1 inb 2 tblkab tblkl rsa rsl rsb outa+ outl h outa - outb+ outl h out b h note: please connect the rsa and rsb, outa+ and outa - , and outb+ and outb- when using the large mode operation. 1 large dc motor operation h - bridge a outa - o ut a ) rrs vm h - bridge b motor outb - outb )
tb67h400a fg/aftg/afng 2013- 11- 20 16 about motor control (constant current control) about the current waveform of mixed decay mode, a nd a setting in the case of constant current control, the rate of mixed decay mode which determines current ripple is fixed to 37.5%. mixed decay mode current waveform timing charts may be simplified for explanatory purpose s . nf detect fchop 37.5% m ixed d ecay m ode internal osc mdt (m ixed d ecay t iming ): 37.5% fixed fchop 1 cycle 16clk 6 clk / 16clk = 37.5% fchop c harge m ode nf detect s low m ode m ixed d ecay timing f ast m ode c harge mode iout s etting current value mdt nf detect nf detect s etting current value 37.5% m ixed d ecay m ode internal osc iout fchop fchop
tb67h400a fg/aftg/afng 2013- 11- 20 17 ? current waveform in mixed (slow + fast) decay mode ? when a current value increases (mixed - decay point is fixed to 37.5%) ? when a current value decreases (mixed - decay point is fixed to 37.5%) the charge period starts as the internal oscillator clock starts counting. when the output current reaches the predefined current level, the internal rs comparator detects the predefined current level (nf); as a result, the ic enters slow - decay mode. the tb6 7h400 a transits from slow - decay mode to fast - decay mode at the point 37.5% of a pwm frequency (one chopping frequency) remains in a whole pwm frequency period (on the rising edge of the 11th clock of the oscm clock). when the oscm pin clock counter clocks 16 times, the fast - decay mode ends; and at the same time, the counter is reset, which brings the tb6 7h400a into charge mode again. note: these figures are intended for illustrative purposes only. if designed more realistically, they would show transient response curves. timing charts may be simplified for explanatory purposes. i nternal osc s etting current value f chop f chop f chop f chop nf nf nf nf c harge slow slow c h arge fast fast c harge slow fast slow c harge fast s etting current value nf nf internal osc s etting current value c harge f chop f chop f chop f chop nf setting curren t value c harge slow slow c harge fast fast nf nf slow fast slow c harge fast the ic enters charge mode for a moment at which the internal rs comparator compares the values. the ic immediately enters slow - decay mode because of the current value exceeding the predefined current level. c harge
tb67h400a fg/aftg/afng 2013- 11- 20 18 output transistor operation mode output transistor operational function mode u1 u2 l1 l2 charge on off off on slow off off on on fast off on on off note: the parameters shown in the table above are examples when the current flows in the directions shown in the figures abov e. for the curre nt flowing in the reverse direction, the parameters change as shown in the table below. mode u1 u2 l1 l2 charge off on on off slow off off on on fast on off off on this ic controls the motor current to be constant by 3 modes listed above. the equiv alent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. u1 l1 u2 l2 pgnd off off u1 l1 u2 l2 off on on load pgnd u1 l1 u2 l2 load pgnd rspin rrs vm on on load charge mode a current flows into the motor coil. slow mode a current circulates around the motor coil and this device. fast mode the energy of the motor coil is fed back to the power on rs pin rrs vm rs pin rrs vm off off on off
tb67h400a fg/aftg/afng 2013- 11- 20 19 calculation of the predefined output current for pw m constant - current control, this ic uses a clock generated by the oscm oscillator. the peak o utput current (s etting current value ) can be set via the current - sensing resistor (r r s) and the reference voltage (vref), as follows: iout(max) = vref(gain) vref(gain) : the vref decay rate is 1/ 5.0 (typ.) for example : in the case of a 100% setup when vref = 3 .0 v, torque=100%,rs=0.51 , the motor constant current ( s etting current value ) will be calculated as: i out = 3.0 v / 5.0 / 0.51 = 1.18 a calculation of the oscm oscillation frequency (chopper reference frequency) an approximation of the oscm oscillation frequency (foscm) and chopper frequency (fchop) can be calculated by the following expressions. foscm=1/[0. 56 x{cx(r1+500)}] c,r1: external co mponents for oscm (c=270pf , r 1 = 5.1 k? => about foscm= 1.12mhz(typ.) ) fchop = fo scm / 16 foscm= 1.12mhz => fchop = about 70khz if chopping frequency is raised, rippl e of current will become small and wave - like reproducibility will improve. however, the gate loss inside ic goes up and generation of heat becomes large. by lo wering chopping frequency, reduction in generation of heat is expectable. however, rippl e of current may become large. it is a standard about about 70 khz. a setup in the range of 50 to 100 khz is recommended. vref(v) r rs ()
tb67h400a fg/aftg/afng 2013- 11- 20 20 absolute maximum rating s (ta = 25c) characteristics symbol rating unit note motor power supply vm 50 v - motor output voltage v out 50 v - motor output current i out _(s) 4.0 a (small mode) note 1 i out _(l) 8.0 a (large mode) note 1 vcc voltage vcc 6.0 v when externally appli ed. digital input voltage vin(h) 6.0 v - vin(l) - 0.4 v - vref input voltage v ref gnd 4.2 v - power dissipation (wqfn 48) pd 1.3 w note2 power dissipation(htssop48) pd 1.3 w note2 power dissipation(hsop28) pd 1.15 w note2 operating temperature topr - 20 85 c - storage temperature tstr - 55 150 c - junction temperature tj(max) 150 c - note 1: while in use, please make sure to take the heat generation matter into consideration, and use below 70% of the absolute maximum ratings (iout(s) Q 2.8 a, iout (l) Q 5.6a) as a reference. operating conditions (such as surrounding temperature or board conditions) may limit the operating current. (depends on the heat conditions.) note 2: the value in the state where it is not mounted on the board ta: ambient tempera ture. topr: operating ambient temperature. tj: operating junction temperature. the maximum junction temperature is limited by the thermal shutdown. use the maximum junction temperature (tj) at 120c or less. the maximum current cannot be used under certain thermal conditions. caution absolute maximum ratings the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating (s) may cause device breakdown, damage or deteriora tion, and may result in injury by explosion or combustion. the value of even one parameter of the absolute maximum ratings should not be exceeded under any circumstances. the tb67 h400 a does not have overvoltage detection circuit . therefore, the device is d amaged if a voltage exceeding its rated maximum is applied. all voltage ratings, including supply voltages, must always be followed. the other notes and considerations described later should also be referred to. operating ranges (ta= -2 0 to 85c) character istics symbol min typ. max unit note vm power supply vm 10 24 47 v motor output current i out (s) - 1.5 3.0 a small mode iout (l) - 3.0 6.0 a large mode logic input voltage vin(h) 2.0 - 5.5 v logic [high] level vin(l) gnd - 0.8 v logic [low] level logic input frequency flogic - - 400 khz in1,in2,pwm pwm signal frequency fchop(range) 40 70 150 khz vref input voltage vref gnd 2 .0 4.0 v note: the actual maximum current may be limited by the operating environment (operating conditions such operat ing duration, or by the surrounding temperature or board heat dissipation). determine a realistic maximum current by calculating the heat generated under the operating environment.
tb67h400a fg/aftg/afng 2013- 11- 20 21 electrical specifications 1 (ta=25c, vm=24v, unless specified otherwise ) characteristics symbol note min typ. max unit logic input voltage high vin(h) logic input pins (note) 2 - 5.5 v low vin(l) logic input pins (note) 0 - 0.8 v logic input hysteresis voltage vin(hys) logic input pins (note) 100 - 300 mv logic input cu rrent high iin(h) logic input pins :3.3v - 33 - a low iin(l) logic input pins :0v - - 1 a power consumption im1 output:open, standby mode - 2 3 .5 ma im2 output :open, pwm=h, in1, in2=low - 3.5 5 .5 ma im3 output:open - 5 .5 7 ma output leakage curren t high ioh vrs=vm=50v,vout=0v - - 1 a low iol vrs=vm=vout=50v 1 - - a output current channel differential i out 1 bridge a,b differential -5 0 5 % output current accuracy iout 2 iout =1. 5 a - 5 0 5 % rs pin current irs vrs=vm=24v 0 - 10 a drain - source on - resistance (high side + low side) ron(h+l) tj=25 c , forward direction high side+low side small mode h 0.49 0.6 note: vin(l) is defined as the vin voltage that causes the outputs (outa+, outa - , outb+ and outb- ) to change when a pin under test is gradually raised from 0 v. vin(h) is defined as the vin voltage that causes the outputs (outa+, outa - , outb+ and outb- ) to change when th e pin is then gradually lowered. the difference between vin(h) and vin(l) is defined as the vin(hys) . note: the intern al circuits are designed to avoid miss - function or leakage current; when the logic signal is applied while the vm voltage is not supplied. but for fail - safe, please control the power supply and logic signal timing correctly.
tb67h400a fg/aftg/afng 2013- 11- 20 22 electrical specifications 2 (ta=25c, vm=24v, unless specified otherwise) characteristics symbol note min typ. max unit vref input current iref vref=2.0v - 0 1 a internal regulator voltage vcc icc=5.0ma 4.75 5.0 5.25 v internal regulator current icc vcc=5.0v - 2.5 5 ma vref gain rate vref(gain) vref=2.0v 1/5.2 1/5.0 1/4.8 tsd threshold (note1) t j tsd 145 160 175 vm power on reset voltage vmr 7.0 8.0 9.0 v over current threshold (note2) isd 4.1 4.9 5.7 a note 1: thermal shutdown (ts d) circuit when the junction temperature of the device reaches the tsd threshold, the tsd circuit is triggered; the internal reset circuit then turns off the output transistors. once the tsd circuit is triggered, the device will be set to standby mode, and can be cleared by reasserting the vm power source, or setting to standby mode ( ina1,ina2,inb1,inb2,pwma,pwmb=all low ) . the tsd circuit is a backup function to detect a thermal error, therefore is not recommended to be used aggressively. note 2: over - current shutdown (isd) circuit when the output current reaches the threshold, the isd circuit is triggered; the internal reset circuit then turns off the output transistors. once the isd circuit is triggered, the device will be set to standby mode, and can be cleared by reasserting the vm power source, or setting to standby mode (ina1,ina2,inb1,inb2,pwma,pwmb=all low) . back - emf while a motor is rotating, there is a timing at which power is fed back to the power supply. at that timing, the motor current recirculates back to the power supply due to the effect of the motor back - e m f. if the power supply does not have enough sink capability, the power supply and output pins of the device might r ise above the rated voltages. the magnitude of the motor back - emf varies with usage conditions and motor characteristics. it must be fully verified that there is no risk that the tb67h400a or other components will be damaged or fail due to the motor back -e m f. cautions on overcurrent shutdown (isd) and thermal shutdown (tsd) x the isd and tsd circuits are only intended to provide temporary protection against irregular conditions such as an output short - circuit; they do not necessarily guarantee the complete i c safety. x if the device is used beyond the specified operating ranges, these circuits may not operate properly: then the device may be damaged due to an output short - circuit. x the isd circuit is only intended to provide a temporary protection against an out put short - circuit. if such a condition persists for a long time, the device may be damaged due to overstress. overcurrent conditions must be removed immediately by external hardware. ic mounting do not insert devices incorrectly or in the wrong orientatio n. otherwise, it may cause breakdown, damage and/or deterioration of the device.
tb67h400a fg/aftg/afng 2013- 11- 20 23 ac electrical specification (ta = 25 c, vm = 24 v, 6.8 mh/5.7 ? ) characteristics symbol note min typ. max unit minimum phase pulse width flogic(min) 100 - - ns twp 50 - - twn 50 - - output transistor switching characteristics tr 30 80 130 ns tf 40 90 140 tplh(logic) in1,in2,pwm - out 250 - 1200 tphl(logic) in1,in2,pwm - out 250 - 1200 analog blanking time atblk vm=24v,iout=1.5a anal og tblk 250 400 550 ns digital blanking time dtblk(l) tblkab:l, foscm=1120khz - 3. 6 - s dtblk(h) tblkab:h, foscm=1120khz - 5. 4 - s oscm oscillation frequency accuracy % foscm cosc= 270 pf, rosc =5.1 k ? -15 - +15 % osc oscillation reference frequency foscm cosc= 270 pf, rosc =5.1 k ? 952 1120 1288 khz chopping frequency fchop output: active(iout=1.5 a), foscm = 1120 khz - 70 - khz timing chart twp tw n tplh( logic ) tphl( logic ) 10% 90% tr 90% 10% tf logic out 50% 50% 50% 50% 50% 1/flogic
tb67h400a fg/aftg/afng 2013- 11- 20 24 timing charts may be simpli fied for explanatory purpose. package dimensions (unit : mm) hsop28 - p - 0450- 0.80
tb67h400a fg/aftg/afng 2013- 11- 20 25 p - wqfn48 - 0707- 0.50 - 003 unit : mm
tb67h400a fg/aftg/afng 2013- 11- 20 26 htssop48 - p300 - 0.50 unit : mm
tb67h400a fg/aftg/afng 2013- 11- 20 27 notes on contents block diagrams some of the functional blocks, circuits, or consta nts in the block diagram may be omitted or simplified for explanatory purposes. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. timing charts timing charts may be simpl ified for explanatory purposes. application circuits the application circuits shown in this document are provided for reference purposes only. thorough evaluation is required at the mass production design stage. toshiba does not grant any license to any i ndustrial property rights by providing these examples of application circuits. test circuits components in the test circuits are used only to obtain and confirm the device characteristics. these components and circuits are not guaranteed to prevent malfun ction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of t hese ratings.exceeding the rating(s) may cause device breakdown, damage or deterioration, and may result in injury by explosion or combustion. use an appropriate power supply fuse to ensure that a large current does not continuously flow in the case of ov er - current and/or ic failure. the ic will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead to smoke or ignition. to minimize the effects of the flow of a large current in the case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. if your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power on or the negative current resulting f rom the back electromotive force at power off. ic breakdown may cause injury, smoke or ignition. use a stable power supply with ics with built - in protection functions. if the power supply is unstable, the protection function may not operate, causing ic bre akdown. ic breakdown may cause injury, smoke or ignition. do not insert devices in the wrong orientation or incorrectly. make sure that the positive and negative terminals of power supplies are connected properly. otherwise, the current or power consumpt ion may exceed the absolute maximum rating, and exceeding the rating(s) may cause device breakdown, damage or deterioration, and may result in injury by explosion or combustion. in addition, do not use any device that has been inserted incorrectly. please take extra care when selecting external components (such as power amps and regulators) or external devices (for instance, speakers). when large amounts of leak current occurs from capacitors, the dc output level may increase. if the output is connected to devices such as speakers with low resist voltage, overcurrent or ic failure may cause smoke or ignition. (the over - current may cause smoke or ignition from the ic itself.) in particular, please pay attention when using a bridge tied load (btl) connection - type ic that inputs output dc voltage to a speaker directly.
tb67h400a fg/aftg/afng 2013- 11- 20 28 points to remember on handling of ics over current detection circuit over current detection circuits (referred to as current limiter circuits) do not necessarily protect ics under all circ umstances. if the over current detection circuits operate against the over current, clear the over current status immediately. depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the over current protec tion circuit to not operate properly or ic breakdown before operation. in addition, depending on the method of use and usage conditions, if over current continues to flow for a long time after operation, the ic may generate heat resulting in breakdown. th ermal shutdown circuit thermal shutdown circuits do not necessarily protect ics under all circumstances. if the thermal shutdown circuits operate against the over temperature, clear the heat generation status immediately. depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the thermal shutdown circuit to not operate properly or ic breakdown before operation. heat radiation design in using an ic with large current flow such as power amp, regulator or dri ver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (t j ) at any time and condition. these ics generate heat even during normal use. an inadequate ic heat radiation design can lead to decrea se in ic life, deterioration of ic characteristics or ic breakdown. in addition, please design the device taking into considerate the effect of ic heat radiation with peripheral components. back - emf when a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motors power supply due to the effect of back - emf. if the current sink capability of the power supply is small, the devices motor power supply and output pins might be exposed to conditions beyond maximum r atings. to avoid this problem, take the effect of back - emf into consideration in system design.
tb67h400a fg/aftg/afng 2013- 11- 20 29 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collectively "toshiba"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduced without prior written permission from toshiba. even w ith toshiba's written permission, reproduction is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible f or complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of product could cause loss of human l ife, bodily injur y or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, customers must also refer to and comply with (a) the lat est versions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and application notes for product and the precautions and conditions set forth in the "toshiba semiconductor reliability handbook " and (b) the instructions for the application with which the product will be used with or for. customers are solely responsible for al l aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; a nd (c) validating all operating parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? product is neither intended nor warranted for use in equipments or systems that require extraordinar ily high levels of quality and/or reliability, and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage and/or serious public impact ( " unintended use " ). except for specific applications as expressly stat ed in this document, unintended use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipme nt, equipment used for automobiles, trains, ships and other transportation, traffic signaling e quipment, equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance - related fields. if you use product for unintended use, toshiba assumes no liability fo r product. for details, please contact your toshiba sales representative. ? do not disassemble, analyze, reverse - engineer, alter, modify, translate or copy product, whether in whole or in part. ? product shall not be used for or incorporated into any produ cts or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations. ? the information contained herein is presented only as guidance for product use. no responsibility is assumed by toshiba for any infringement of patents or any other intellectual property rights of third parties that may result from the use of product. no license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise. ? absent a written signed agreement, except as provided in the relevant terms and conditions of sale for product, and to the maximum extent allowable by law, toshiba (1) assumes no liability whatsoever, including without limitation, indirect, consequential, special, or incidental d amages or loss, including without limitation, loss of profits, loss of opportunities, business interruption and loss of data, and (2) disclaims any and all express or implied warranties and conditions related to sale, use of product, or information, includ ing warranties or conditions of merchantability, fitness for a particular purpose, accuracy of information, or noninfringement. ? do not use or otherwise make available product or related software or technology for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or mis sile technology products (mass destruction weapons). product and related software and technology may be controlled under the applic able export laws and regulations including, without limitation, the japanese foreign exchange and foreign trade law and the u.s. export administration regulations. export and re - export of product or related software or technology are strictly prohibited ex cept in compliance with all applicable export laws and regulations. ? please contact your toshiba sales representative for details as to environmental matters such as the rohs compatibility of product. please use product in compliance with all applicable l aws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the eu rohs directive. toshiba assumes no liability for damages or losses occurring as a result of noncompl iance with applicabl e laws and regulat ions.

▲Up To Search▲

Price & Availability of TB67H400AFNG

	To Download TB67H400AFNG Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .